|Description:||512MB 133MHz Non-ECC CL3 SODIMM||Discontinued|
|Standard 64M X 64 Non-ECC 133MHz 144-pin Unbuffered SODIMM (SDRAM, 3.3V, CL3, Gold)|
CAS latency Column Address Strobe (CAS) latency, or CL, is the delay time between the moment a memory controller tells the memory module to access a particular memory column on a RAM module, and the moment the data from the given array location is available on the module's output pins. In general, the lower the CAS latency, the better.
Memory layout (modules x size) How the overall memory of the product is put together, defined by the number of modules and the size.
1 x 0.5 GB
ECC ECC means Error Correction Code, and it is memory that is able to detect and correct some memory errors without user intervention.
Memory bus Hardware and software that connects the main memory to the memory controller in computer systems. Originally, general-purpose buses like VMEbus and the S-100 bus were used, but to reduce latency, modern memory buses are designed to connect directly to DRAM chips, and thus are designed by chip standards bodies such as JEDEC.
Row cycle time
|Product Condition||Brand New/Unused|
|Memory Form Factor||SODIMM|
|Stock Availability||Available for Shipping, In Stock at Warehouse|
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