This document describes ValueRAM's 512M x 64-bit (4GB) DDR3-1600 CL11 SDRAM (Synchronous DRAM) 1Rx8, memory module, based on eight 512M x 8-bit FBGA components. The SPD is programmed to JEDEC standard latency DDR3-1600
timing of 11-11-11 at 1.5V. This 240-pin DIMM uses gold contact fingers. The electrical and mechanical specifications are as follows:
timing of 11-11-11 at 1.5V. This 240-pin DIMM uses gold contact fingers. The electrical and mechanical specifications are as follows:
FEATURES
- JEDEC standard 1.5V (1.425V ~1.575V) Power Supply
- VDDQ = 1.5V (1.425V ~ 1.575V)
- 800MHz fCK for 1600Mb/sec/pin
- 8 independent internal bank
- Programmable CAS Latency: 11, 10, 9, 8, 7, 6
- Programmable Additive Latency: 0, CL - 2, or CL - 1 clock
- 8-bit pre-fetch
- Burst Length: 8 (Interleave without any limit, sequential with starting address “000” only), 4 with tCCD = 4 which does not allow seamless read or write [either on the fly using A12 or MRS]
- Bi-directional Differential Data Strobe
- Internal(self) calibration : Internal self calibration through ZQ pin (RZQ : 240 ohm ± 1%)
- On Die Termination using ODT pin
- Average Refresh Period 7.8us at lower than TCASE 85°C, 3.9us at 85°C < TCASE < 95°C
- Asynchronous Reset
- PCB : Height 1.180” (30.00mm), single sided component
Features
CAS latency
Column Address Strobe (CAS) latency, or CL, is the delay time between the moment a memory controller tells the memory module to access a particular memory column on a RAM module, and the moment the data from the given array location is available on the module's output pins. In general, the lower the CAS latency, the better.
11
Memory layout (modules x size)
How the overall memory of the product is put together, defined by the number of modules and the size.
1 x 4 GB
Buffered memory type
Unregistered (unbuffered)
ECC
ECC means Error Correction Code, and it is memory that is able to detect and correct some memory errors without user intervention.

Memory bus
Hardware and software that connects the main memory to the memory controller in computer systems. Originally, general-purpose buses like VMEbus and the S-100 bus were used, but to reduce latency, modern memory buses are designed to connect directly to DRAM chips, and thus are designed by chip standards bodies such as JEDEC.
64 bit
Memory ranking
1
Module configuration
512M X 64
Lead plating
Gold
Operational conditions
Other features
Chips organisation
X8
Bus clock rate
1600 MHz
Error indication

240-pin DIMM
SKU | 217042 |
---|---|
MPN | KVR16N11S8/4 |
Brand | Kingston |
Product Condition | Brand New/Unused |
Memory Type | DDR3 |
Memory Form Factor | DIMM |
Stock Availability | Available for Shipping, In Stock at Warehouse |
Warranty Period | Limited Lifetime Warranty |
Warranty Contact | https://www.kingston.com/ |